<h1><span id="ContentPlaceHolder1_uiArticleDetails_uiTitle">Simplifying design</span></h1>
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<div id="commentPanel"><span id="popup-items" class="yoxview overlay-zoom"><a id="ContentPlaceHolder1_uiArticleDetails_uiThumbnailPopupImage" class="popup-item" href="https://www.newelectronics.co.uk/article-images/215697/microchip_popup.jpg"><img id="ContentPlaceHolder1_uiArticleDetails_uiArticleImage" class="img-responsive img-thumbnail categoryImage" src="https://www.newelectronics.co.uk/article-images/215697/microchip.jpg?width=375&amp;height=250&amp;scale=canvas" /></a></span></div>
<div><span id="ContentPlaceHolder1_uiArticleDetails_uiArticleImageCaption" class="imageCaption">Microchip’s ATSAMA5D27-SOM1 intends to reduce overall PCB complexity and cost</span></div>
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<p class="intro"><span id="ContentPlaceHolder1_uiArticleDetails_uiSummary">With the demand for faster and more intelligent microprocessors,the competition continues to intensify.</span></p>
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As the world becomes more connected the demand for better,smarter,faster systems – whether for IIoT,medical or consumer devices – are increasing at an exponential rate,making design more complex.

As a result,semiconductor companies are competing to deliver unique microprocessors (MPU) that simplify the design process,enabling engineers to cater to the growing and widely varied market pressures more quickly.

“Brainpower is our most precious resource,” Lucio di Jasio,EMEA Business Development Manager,Microchip Technology,told NE. “Anytime we can save time or effort for an engineer,we’re providing real value.” He highlights the huge design effort and complexity associated with creating an industrial-grade MPU-based system running a Linux operating system.

Even developers with expertise in the area spend a lot of time on PCB layout to guarantee signal integrity for the high-speed interfaces to DDR memory and Ethernet Physical Layer (PHY) while complying with Electromagnetic Compatibility (EMC) standards,he explained.

“For industrial projects,engineers are expected to deliver a module for the next 10-15 years,but it’s difficult to procure consistently and for a long-time in these quantities.”

To assist,Microchip released a System on Module (SOM) featuring the SAMA5D2 MPU. The ATSAMA5D27-SOM1,which contains the ATSAMA5D27C-D1G-CU System in Package (SiP),intends to simplify design by integrating the power management,non-volatile boot memory,Ethernet PHY and high-speed DDR2 memory onto a small,single-sided PCB.

“It becomes a little black box,ready to use – and able to deliver to the lifespan demands,” he said.

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Another key trend he identified is security. “Getting this implemented from the get-go and as deep as possible is very important.” Using IoT applications as an example,Jasio pointed to the “complexity that comes from the number of layers and different open source projects that have to be combined”,as a main security challenge.

“It might not be obvious where the weaknesses of each one of the packages lies,or the interdependencies of the product you’re using.”
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<td><strong>“The last thing an engineer wants is to go through all the necessary design and certifying processes just for a new,higher performing device or software to be released.”</strong>

Christoph Adam</td>
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Jasio recalls the Heartbleed bug – the vulnerability in the OpenSSL cryptographic software library which enabled hackers to steal information protected,under normal conditions,by the SSL/TLS encryption used to secure the Internet.

“All of a sudden,half of the industry realised they were depending on this one library for their secure connectivity to the Internet. This one weakness in the package had been completely underestimated in its importance. It was a big wake-up call.”

With its latest MPUs,Microchip has implemented Arm cores which comprise the highly regarded TrustZone. In order to further deepen this,Jasio explained that the company has also partnered with several others who provide additional layers of software designed to help engineers manage security.

<strong>Security and longevity</strong>

Christoph Adam,PM and BD manager Europe,Renesas,agreed with Jasio that security and longevity are key trends. He emphasised the increasing use of open source,particularly Linux,and suggested that engineers are now requiring not just the standard 10 years of hardware support,but also the same for their software.

“The systems that support our modern civilisation need to survive for a long time,” explained Adam. “Until now the corresponding industrial grade super long-term maintenance has been done individually by each company with a lot of additional cost. The systems also need to be secure,robust and reliable; and at the same time,industry will need to catch up with the latest security trends.

“The last thing an engineer wants is to go through all the necessary design and certifying processes just for a new,higher performing device or software to be released.”

To resolve this issue,a selection of the big industrial companies came together and asked: ‘What can we do to have an operating system and a kernel that we can support for up to 20 years?’ The answer was the Civil Infrastructure Platform (CIP),an open standard that uses parts of the mainline kernel and supports it over a much longer period of time than the norm and still backports and tests any security relevant patches

Renesas’ RZ/G1 (32bit) and RZ/G2 (64bit) MPUs based on ARM architecture support CIP Linux Kernels,and as such Adam said the product is reducing this “customer cost of doing and maintaining business”.

The company is also offering a verified Renesas Linux package (VLP) to help engineers creating their Linux platform quickly and with high quality. This comprises downloading various middleware,integrating it with the Linux kernel,testing and maintaining it.

“Traditionally,dedicated platform or Linux engineers work on this,integrating open source software components (Yocto build) and performing regression tests. They have to generate documentation,manage release builds,test them and distribute releases,” Adam said.

VLP is verified distribution where all the middleware has been integrated with CIP Linux kernel and regression tested by Renesas to speed up customer’s platform development.

<img class="img-responsive" src="http://www.newelectronics.co.uk/article-images/image-library/93/lucio_di_jasio_highest_res_58a7baeb.jpg" alt="" width="148" height="208" />Renesas continues to update the VLP with regular releases and documentation that looks to enhance high software quality and reliability and generates software longevity for far more than 10 years.

<strong>Operating systems</strong>

For STMicroelectronics,the demand it saw was for higher performing devices that can offer open source Linux,coupled with a real-time operating system (RTOS).
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<td><strong>“This one weakness in the package had been completely underestimated in its importance. It was a big wake-up call.”</strong>

Lucio Di Jasio</td>
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To deliver this,STMicro has applied its Arm Cortex expertise to expand the capabilities of its STM32 microcontroller (MCU) family with the release of its STM32MP1 multicore MPU series.

Rather than using two chips – a MPU and MCU – the STM32MP1 has embedded both into a single chip. According to STMicroelectronics’s Market Development Manager,Sylvain Raynaud,this provides engineers with a chip capable of delivering MPU compute and graphics support alongside power efficient real-time control and high feature integration.

To do this,STMicro embedded dual Arm Cortex-A7 application processor cores running at 650MHz with a high-performance Arm Cortex-M4 MCU core running at 209MHz onto the same chip. By implementing both types of Cortex,the chip can provide a Linux open source operating system and a RTOS in parallel.

This heterogenous architecture enables what Raynaud calls a “switch on/switch off experience”,making the device suitable for a much wider set of applications,with customers able to develop “a new range of applications”.

For example,by stopping Cortex-A7 execution and running only the more efficient Cortex-M4,power can typically be reduced to 25%. From this mode,going to Standby further cuts power by 2.5x,while still supporting the resumption of Linux execution in 1-3 seconds.

Furthermore,a large set of peripherals are embedded into the device that can be allocated to either Cortex-A/Linux or Cortex-M/real-time activities.

To further accelerate development,STMicro has also released OpenSTLinux Distribution,a mainline open-source Linux distribution which is said to contain all the essential building blocks for running software on the application processor cores.

While enhanced STm32Cube tools,which have been specially upgraded from the STM32Cube package for Cortex-M MCUs,have been designed to feature all necessary characteristics to accelerate MPU developing using Arm Cortex-A-core MPUs.

<strong>Future developments</strong>

As for the future,Jasio said the never-ending race to create the fastest MPU,the largest amount of memory will continue,but Microchip’s focus will be on integration.

“We’re going for integration of features that are perhaps not traditional – graphic,touch,audio controllers,” he said. “It goes way beyond offering customers just some Internet connectivity or a big chuck of RAM.”

For Adam,he said the market will see trends such as even higher resolution for graphic applications,AI inference at the edge,and in the future,even incremental learning at the edge point.

“This will take additional Hardware and power in the microprocessors. We will see more and more microprocessors coming into new markets,” he explained.

While Raynaud expressed STMicro’s commitment to the MPU segment,stating that the company is “very serious” about its position. “We’ve started developing two more MPUs which will cater to the market demands we see coming to the fore. This includes an MPU to address low power needs and one for high performance which is required for graphic applications.”

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Simplifying design

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Simplifying design

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